Associate Professor Tsung-Che Chiang

Department of Computer Science and Information Engineering
National Taiwan Normal University

Tel: +886-2-77346692    Fax: +886-2-29322378    Email


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Tsung-Che Chiang and Li-Chen Fu, A simulation study on dispatching rules in semiconductor wafer fabrication facilities with due date-based objectives,  Proc. of IEEE International Conference on Systems, Man, and Cybernetics, pp. 4660 - 4665, October, 2006.

Full text: IEEEXplore

Abstract

This paper addresses the lot scheduling problem in the semiconductor wafer fabrication facilities. We provide a simulation study to examine the performance of sixteen existing dispatching rules on the tardy rate, mean tardiness, and the maximum tardiness. A public and representative test bed, the MIMAC (Measurement and Improvement of MAnufacturing Capacities) test bed is used. The best rules with respect to each objective are identified through the experiments, and some findings are provided to be guidelines for designing new dispatching rules.

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